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計算機結構與作業系統

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國立臺灣大學 2026 · 考試 · 第 7 題

Regarding a general computer architecture and ISA design principles, select correct description(s).

(複選;至少一個正確選項,每個選項獨立計分。)

  • (A)
    Increasing pipeline depth improves performance primarily by decreasing the CPI.
  • (B)
    Removing byte load and store instructions from the ISA can potentially increase the code sizes of most applications.
  • (C)
    Transitioning from a load/store ISA to a memory-register ISA (allowing memory operands in arithmetic instructions) typically increases instruction count.
  • (D)
    Increasing the number of architectural registers can reduce instruction count and thus improve overall performance.
  • (E)
    Incorporating complex addressing modes into ISA reduces instruction count but complicates hardware implementations, leading to an increase in the clock cycle time.

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